Overview

This unit introduces you to modern logic design techniques, hardware used and common representations. Topics include two and multi-level combinational logic, decoders, multiplexers, arithmetic circuits, programmable and steering logic, flip-flops, registers, counters, RAM and ROM. Using this hardware the design component will include finite state machine design and applications to … For more content click the Read More button below.

Offerings

S2-01-CLAYTON-ON-CAMPUS
S2-01-MALAYSIA-ON-CAMPUS

Rules

Enrolment Rule

Contacts

Chief Examiner(s)

Associate Professor Lindsay Kleeman

Unit Coordinator(s)

Associate Professor Lindsay Kleeman
Dr Patrick Ho

Teaching approach

Active learning

Assessment summary

Continuous assessment: 40%

Final assessment: 60%

This unit contains hurdle requirements that you must achieve to be able to pass the unit. You are required to achieve at least 45% in the total continuous assessment component and at least 45% in the final assessment component. The consequence of not achieving a hurdle requirement is a fail grade (NH) and a maximum mark of 45 for the unit.

Assessment

1 - Laboratory preliminary work and completion
2 - Mid-semester test
3 - Assignment
4 - Final assessment

Scheduled and non-scheduled teaching activities

Assessments
Laboratories
Lectures
Practical activities

Workload requirements

Workload

Learning resources

Technology resources

Other unit costs

Costs are indicative and subject to change.

Availability in areas of study

Specialisations:
Electrical and computer systems engineering
Robotics and mechatronics engineering
Professional electrical engineering